8( ^H&friendlyarm,nanopi-m5rockchip,rk3576 +7FriendlyElec NanoPi M5aliases=/soc/i2c@27300000B/soc/i2c@2ac40000G/soc/i2c@2ac50000L/soc/i2c@2ac60000Q/soc/i2c@2ac70000V/soc/i2c@2ac80000[/soc/i2c@2ac90000`/soc/i2c@2aca0000e/soc/i2c@2acb0000j/soc/i2c@2ae80000o/soc/serial@2ad40000w/soc/serial@27310000/soc/serial@2ad50000/soc/serial@2ad60000/soc/serial@2ad70000/soc/serial@2ad80000/soc/serial@2ad90000/soc/serial@2ada0000/soc/serial@2adb0000/soc/serial@2adc0000/soc/serial@2afc0000/soc/serial@2afd0000/soc/spi@2acf0000/soc/spi@2ad00000/soc/spi@2ad10000/soc/spi@2ad20000/soc/spi@2ad30000/soc/ethernet@2a220000/soc/ethernet@2a230000/soc/mmc@2a310000clock-xin32k fixed-clockxin32k&clock-xin24m fixed-clock&n6xin24mclock-spll fixed-clock&)׫spllcpus+cpu-mapcluster0core03core13core23core33cluster1core03core13core23core33 cpu@07cpuarm,cortex-a53CGpsciUh o x  cpu@17cpuarm,cortex-a53CGpsciUh o   cpu@27cpuarm,cortex-a53CGpsciUh o   cpu@37cpuarm,cortex-a53CGpsciUh o   cpu@1007cpuarm,cortex-a72CGpsciUh o@ cpu@1017cpuarm,cortex-a72CGpsciUh o cpu@1027cpuarm,cortex-a72CGpsciUh o cpu@1037cpuarm,cortex-a72CGpsciUh o  idle-statespscicpu-sleeparm,idle-statex% opp-table-cluster0operating-points-v26 opp-408000000AQ H ` `~V@opp-600000000A#F H ` `~V@opp-816000000A0, H ` `~V@opp-1008000000A< H ` `~V@opp-1200000000AG H ` `~V@opp-1416000000ATfr H  ~V@opp-1608000000A_" H q q~V@opp-1800000000AkI H ~V@gopp-2016000000Ax) H ~V@opp-table-cluster1operating-points-v26opp-408000000AQ H ` `~V@gopp-600000000A#F H ` `~V@opp-816000000A0, H ` `~V@opp-1008000000A< H ` `~V@opp-1200000000AG H ` `~V@opp-1416000000ATfr H 4 4~V@opp-1608000000A_" H @ @~V@opp-1800000000AkI H 5 5~V@opp-2016000000Ax) H )$ )$~V@opp-2208000000Ah HHH~V@opp-table-gpuoperating-points-v2Yopp-300000000A H ` ` Popp-400000000Aׄ H ` ` Popp-500000000Ae H ` ` Popp-600000000A#F H ` ` Popp-700000000A)' H   Popp-800000000A/ H X X Popp-900000000A5 H Popp-950000000A8ـ H P P Pdisplay-subsystemrockchip,display-subsystemsfirmwarescmi arm,scmi-smcy+protocol@14C& hdmi-soundsimple-audio-cardHDMIi2s disabledsimple-audio-card,codecsimple-audio-card,cpupinctrlrockchip,rk3576-pinctrl+gpio@27320000rockchip,gpio-bankC'2h    5Agpio@2ae10000rockchip,gpio-bankC*h    5Agpio@2ae20000rockchip,gpio-bankC*h @   5A'gpio@2ae30000rockchip,gpio-bankC*h `   5Agpio@2ae40000rockchip,gpio-bankC*h    5Apcfg-pull-upRpcfg-pull-down_pcfg-pull-nonenpcfg-pull-none-drv-level-2n{pcfg-pull-up-drv-level-2R{pcfg-pull-up-drv-level-3R{pcfg-pull-none-smtnaupll_clkcam_clk0cam_clk1cam_clk2can0can1clk0_32kclk1_32kclk_32kcpubigcpulitdebug0_testdebug1_testdebug2_testdebug3_testdebug4_testdebug5_testdebug6_testdebug7_testdpdsm_auddsmcdsmc_testclkdsmc_testdataedp_txemmcemmc-rstnout emmc-bus8emmc-clk emmc-cmdemmc-strb emmc_testclkemmc_testdataeth0eth0m0-miim oeth0m0-rx_bus20  qeth0m0-tx_bus20   peth0m0-rgmii_clk reth0m0-rgmii_bus@seth1eth1m0-miim zeth1m0-rx_bus20|eth1m0-tx_bus20{eth1m0-rgmii_clk }eth1m0-rgmii_bus@~eth0_ptpeth0_testrxclketh0_testrxdeth1_ptpeth1_testrxclketh1_testrxdeth_clk0_25meth_clk1_25mflexbus0flexbus1flexbus0_testclkflexbus0_testdataflexbus1_testclkflexbus1_testdatafspi0fspi1fspi1m1-pinsPfspi1m1-csn0fspi0_testclkfspi0_testdatafspi1_testclkfspi1_testdatagpuhdmi_txhdmi_txm0-pins   chdmi-tx-scl dhdmi-tx-sda ei2c0i2c0m0-xfer   1i2c1i2c1m0-xfer   i2c2i2c2m0-xfer   i2c3i2c3m0-xfer   i2c4i2c4m0-xfer   i2c5i2c5m3-xfer   i2c6i2c6m0-xfer   i2c7i2c7m0-xfer   i2c8i2c8m0-xfer   i2c9i2c9m0-xfer   i3c0i3c1i3c0_sdai3c1_sdaisp_flashisp_prelightjtagmipinpupcie0pcie1pdm0pdm1pmu_debug_testpwm0pwm1pwm2ref_clk0ref_clk1ref_clk2sai0sai0m0-lrcksai0m0-sclksai0m0-sdi0sai0m0-sdi1 sai0m0-sdi2 sai0m0-sdi3 sai0m0-sdo0sai0m0-sdo1sai0m0-sdo2 sai0m0-sdo3sai1sai1m0-lrcksai1m0-sclksai1m0-sdi0 sai1m0-sdo0sai1m0-sdo1sai1m0-sdo2 sai1m0-sdo3 sai2sai2m0-lrcksai2m0-mclksai2m0-sclksai2m0-sdisai2m0-sdosai3sai3m0-lrcksai3m0-sclksai3m0-sdisai3m0-sdo sai4sai4m0-lrcksai4m0-sclksai4m0-sdisai4m0-sdo sata30sata30_port0sata30_port1sdmmc0sdmmc0-bus4@sdmmc0-clksdmmc0-cmdsdmmc0-detsdmmc1sdmmc1m0-bus4@  sdmmc1m0-clksdmmc1m0-cmdsdmmc0_testclksdmmc0_testdatasdmmc1_testclksdmmc1_testdataspdifspi0spi0m0-pins0   spi0m0-csn0 spi0m0-csn1 spi1spi1m0-pins0   spi1m0-csn0 spi1m0-csn1 spi2spi2m0-pins0   spi2m0-csn0 spi2m0-csn1 spi3spi3m0-pins0   spi3m0-csn0 spi3m0-csn1 spi4spi4m0-pins0   spi4m0-csn0 spi4m0-csn1 test_clktsadctsadc_ctrluart0uart0m0-xfer   uart1uart1m0-xfer   3uart2uart2m0-xfer   uart3uart3m0-xfer   uart4uart4m0-xfer   uart5uart5m0-xfer   uart6uart6m0-xfer   uart7uart7m0-xfer   uart8uart8m0-xfer   uart9uart9m0-xfer   uart10uart10m0-xfer   uart11uart11m0-xfer   ufsufs-refclkufs-rstgpioufs_testdata0ufs_testdata1ufs_testdata2ufs_testdata3vi_cifvo_lcdcvo_postvp0_syncvp1_syncvp2_syncpmicpmic-pins   vovo_ebcgmacgmac0-int tgmac0-rst ugmac1-intgmac1-rsthym8563hym8563-intkeysusr-button-lledsled-sys-h led1-hled2-hpciepcie0-pwren-hpcie0-perstn &sdmmcsdmmc0-pwren-hsoundhp-det-lusbusb3-host-pwren-husb-otg0-pwren-hpmu-a53arm,cortex-a53-pmu0pmu-a72arm,cortex-a72-pmu0 psci arm,psci-1.0Nsmcthermal-zonespackage-thermaltripspackage-crit8 >criticalbigcore-thermaldtripsbigcore-alertL>passivebigcore-crit8 >criticalcooling-mapsmap0 0 littlecore-thermaldtripslittlecore-alertL>passive littlecore-crit8 >criticalcooling-mapsmap0 0gpu-thermaldtripsgpu-alertL>passive!gpu-crit8 >criticalcooling-mapsmap0 ! "npu-thermaltripsnpu-crit8 >criticalddr-thermaltripsddr-crit8 >criticaltimerarm,armv8-timer0   soc simple-bus+pcie@22000000*rockchip,rk3576-pcierockchip,rk3568-pcie0C"@*  dbiapbconfig)(h$3aclk_mstaclk_slvaclk_dbipclkaux7pciH?syspmcmsglegacyerrmsiAO`b####p$ pcie-phy%T     pwrpipe+okaydefault&  ' (legacy-interrupt-controller A  #pcie@22400000*rockchip,rk3576-pcierockchip,rk3568-pcie0C"@@*!!dbiapbconfig) /(h  $3aclk_mstaclk_slvaclk_dbipclkaux7pciH     ?syspmcmsglegacyerrmsiAO`b))))p* pcie-phy% T!!! !   pwrpipe+ disabledlegacy-interrupt-controller A   )usb@23000000rockchip,rk3576-dwc3snps,dwc3C#@hEFD3ref_clksuspend_clkbus_clk %)otg +,usb2-phyusb3-phy 1utmi_wide:Rjokay$-usb@23400000rockchip,rk3576-dwc3snps,dwc3C#@@h3ref_clksuspend_clkbus_clk %)host .*usb2-phyusb3-phy 1utmi_wide:Rj+Eokaysyscon@2600a000rockchip,rk3576-sys-grfsysconC& ]syscon@2600c000#rockchip,rk3576-bigcore-grfsysconC& syscon@2600e000#rockchip,rk3576-litcore-grfsysconC& syscon@26010000rockchip,rk3576-cci-grfsysconC& syscon@26016000rockchip,rk3576-gpu-grfsysconC&` syscon@26018000rockchip,rk3576-npu-grfsysconC& syscon@2601a000rockchip,rk3576-vo0-grfsysconC& bsyscon@2601e000rockchip,rk3576-usb-grfsysconC&syscon@26020000rockchip,rk3576-php-grfsysconC& syscon@26024000+rockchip,rk3576-pmu0-grfsysconsimple-mfdC&@syscon@26026000 rockchip,rk3576-pmu1-grfsysconC&`syscon@26028000$rockchip,rk3576-pipe-phy-grfsysconC& syscon@2602a000$rockchip,rk3576-pipe-phy-grfsysconC& syscon@2602c000$rockchip,rk3576-usbdpphy-grfsysconC& syscon@2602e000.rockchip,rk3576-usb2phy-grfsysconsimple-mfdC&@+usb2-phy@0rockchip,rk3576-usb2phyCphyapbhGH3phyclkaclkaclk_slv usb480m_phy0&okay-otg-portR$^_`?otg-bvalidotg-idlinestateokay]/+usb2-phy@2000rockchip,rk3576-usb2phyC phyapbh  3phyclkaclkaclk_slv usb480m_phy1&okayotg-portR$bcd?otg-bvalidotg-idlinestateokay]0.syscon@26032000$rockchip,rk3576-hdptxphy-grfsysconC& syscon@26034000!rockchip,rk3576-dcphy-grfsysconC&@ hsyscon@26036000rockchip,rk3576-vo1-grfsysconC&`hsyscon@26038000"rockchip,rk3576-sdgmac-grfsysconC&isyscon@26040000*rockchip,rk3576-ioc-grfsysconsimple-mfdC&clock-controller@27200000rockchip,rk3576-cruC' &hpu  8Fq;.@ e沀e沀i2c@27300000(rockchip,rk3576-i2crockchip,rk3399-i2cC'0h 3i2cpclk Xdefault1+ disabledserial@27310000&rockchip,rk3576-uartsnps,dw-apb-uartC'1h3baudclkapb_pclk22  Mdefault3 disabledpower-management@27380000&rockchip,rk3576-pmusysconsimple-mfdC'8^power-controller!rockchip,rk3576-power-controller+%power-domain@0C+power-domain@1C@h45678+power-domain@2Ch9power-domain@3Ch:power-domain@4Ch;power-domain@5Ch<=+power-domain@6CHh3"(0#)>?@ABCpower-domain@8C h DE+power-domain@9C power-domain@10C power-domain@12C hFpower-domain@13C Ph\[RSPOXWUTGHIJKpower-domain@14Ch=>Lpower-domain@15C`hghfcdeilmpnoMNOPQ+power-domain@11C ha`Rpower-domain@18C hST+power-domain@7C(hBGHIUVpower-domain@16C(hWpower-domain@17C(hXgpu@27800000&rockchip,rk3576-maliarm,mali-bifrostC'u  =h3coreY$[\] ?jobmmugpuoY%okayZ"vop@27d00000rockchip,rk3576-vop C'0'Pvopgamma-lut0V{|}?sysvp0vp1vp2,h[23aclkhclkdclk_vp0dclk_vp1dclk_vp2pll_hdmiphy0\%]^okayports+port@0+Cendpoint@2C_fport@1+Cport@2+Ciommu@27d07e00,rockchip,rk3576-iommurockchip,rk3568-iommu C'~' Vh 3aclkiface%okay\sai@27d40000rockchip,rk3576-saiC' h 3mclkhclk`%rx%ijmh/EVSAI5 disabledsai@27d50000rockchip,rk3576-saiC' h 3mclkhclk``%txrx%klmh/hEVSAI6 disableddsi@27d80000rockchip,rk3576-mipi-dsi2C' Yh 3pclksys%capba dcphyb disabledports+port@0Cport@1Chdmi@27da0000rockchip,rk3576-dw-hdmi-qpC'0h3pclkearcrefaudhdphclk_vo1<RSTUo?avpcecearcmainhpd[default cde%frefhdp~bEokayports+port@0Cendpointf_port@1Cendpointgsai@27ed0000rockchip,rk3576-saiC' h 3mclkhclk`%tx%uvmhhEVSAI7 disabledsai@27ee0000rockchip,rk3576-saiC' th 3mclkhclkh%tx%rqmhhEVSAI8 disabledsai@27ef0000rockchip,rk3576-saiC' uh 3mclkhclk2%tx%mhhEVSAI9 disabledqos@27f02000rockchip,rk3576-qossysconC' Xqos@27f04000rockchip,rk3576-qossysconC'@ >qos@27f04080rockchip,rk3576-qossysconC'@ ?qos@27f04100rockchip,rk3576-qossysconC'A @qos@27f04180rockchip,rk3576-qossysconC'A Aqos@27f04200rockchip,rk3576-qossysconC'B Bqos@27f04280rockchip,rk3576-qossysconC'B Cqos@27f05000rockchip,rk3576-qossysconC'P ;qos@27f06000rockchip,rk3576-qossysconC'` Fqos@27f08000rockchip,rk3576-qossysconC' 4qos@27f08080rockchip,rk3576-qossysconC' 5qos@27f08100rockchip,rk3576-qossysconC' 6qos@27f09000rockchip,rk3576-qossysconC' <qos@27f09080rockchip,rk3576-qossysconC' =qos@27f0a000rockchip,rk3576-qossysconC' Dqos@27f0a080rockchip,rk3576-qossysconC' Eqos@27f0c000rockchip,rk3576-qossysconC' Lqos@27f0d000rockchip,rk3576-qossysconC' qos@27f0e000rockchip,rk3576-qossysconC' Uqos@27f0e080rockchip,rk3576-qossysconC' Vqos@27f0f000rockchip,rk3576-qossysconC' Rqos@27f10000rockchip,rk3576-qossysconC' Mqos@27f10080rockchip,rk3576-qossysconC' Nqos@27f10100rockchip,rk3576-qossysconC' Oqos@27f10180rockchip,rk3576-qossysconC' Pqos@27f10200rockchip,rk3576-qossysconC' Qqos@27f11000rockchip,rk3576-qossysconC' Wqos@27f12800rockchip,rk3576-qossysconC'( Sqos@27f12880rockchip,rk3576-qossysconC'( Tqos@27f13000rockchip,rk3576-qossysconC'0 Gqos@27f13080rockchip,rk3576-qossysconC'0 Iqos@27f13100rockchip,rk3576-qossysconC'1 Jqos@27f13180rockchip,rk3576-qossysconC'1 Hqos@27f13200rockchip,rk3576-qossysconC'2 Kqos@27f20000rockchip,rk3576-qossysconC' 9qos@27f21000rockchip,rk3576-qossysconC' :qos@27f22080rockchip,rk3576-qossysconC' 7qos@27f22100rockchip,rk3576-qossysconC'! 8ethernet@2a220000&rockchip,rk3576-gmacsnps,dwmac-4.20aC*"(h$. %03stmmacethclk_mac_refpclk_macaclk_macptp_ref%*?macirqeth_wake_irq% stmmacethijklokayoutputm rgmii-id]ndefaultopqrsmdiosnps,dwmac-mdio+phy@1ethernet-phy-ieee802.3-c22Ch+ ' defaulttuN    ' mstmmac-axi-config2<Ljrx-queues-config\kqueue0tx-queues-configrlqueue0ethernet@2a230000&rockchip,rk3576-gmacsnps,dwmac-4.20aC*#(h%/!$03stmmacethclk_mac_refpclk_macaclk_macptp_ref-2?macirqeth_wake_irq%  stmmacethivwxokayoutputy rgmii-id]ndefaultz{|}~mdiosnps,dwmac-mdio+phy@1ethernet-phy-ieee802.3-c22Ch, defaultN    ystmmac-axi-config2<Lvrx-queues-config\wqueue0tx-queues-configrxqueue0sata@2a240000'rockchip,rk3576-dwc-ahcisnps,dwc-ahciC*$h3satapmaliverxoob % $ sata-phyE disabledsata@2a250000'rockchip,rk3576-dwc-ahcisnps,dwc-ahciC*%h3satapmaliverxoob % * sata-phyE disabledufshc@2a2d0000rockchip,rk3576-ufshcPC*-+&&*."hcimphyhci_grfmphy_grfhci_apb hIC3corepclkpclk_mphyref_outu; i%default !"$biusysufsgrf   disabledspi@2a300000 rockchip,sfcC*0@ h*+3clk_sfchclk_sfc%+okaydefaultflash@0jedec,spi-norCmmc@2a310000rockchip,rk3576-dw-mshcC*1@h)(3biuciu  default% resetokay   ! ( 0 >n Jmmc@2a320000rockchip,rk3576-dw-mshcC*2@h#"3biuciu   default% reset disabledmmc@2a3300000rockchip,rk3576-dwcmshcrockchip,rk3588-dwcmshcC*3u  n6 (h3corebusaxiblocktimer  default%(corebusaxiblocktimer W disabledspi@2a340000 rockchip,sfcC*4@ h3clk_sfchclk_sfc%+ disabledrng@2a410000rockchip,rk3576-rngC*Ah otp@2a580000rockchip,rk3576-otpC*X+h13otpapb_pclkphyotpapbcpu-code@2Ccpu-version@5C did@aC cpub-leakage@1eCcpul-leakage@1fCnpu-leakage@20C gpu-leakage@21C!log-leakage@22C"bigcore-tsadc-trim@24C$ d litcore-tsadc-trim@26C& d ddr-tsadc-trim@28C( d npu-tsadc-trim@2aC* d gpu-tsadc-trim@2cC, d soc-tsadc-trim@64Cd d sai@2a600000rockchip,rk3576-saiC*` h@A 3mclkhclk22%txrx% mhdefault(EVSAI0 disabledsai@2a610000rockchip,rk3576-saiC*a hGH 3mclkhclk22%txrx% mhdefaultEVSAI1 disabledsai@2a620000rockchip,rk3576-saiC*b hJK 3mclkhclkhh%txrx% mhdefaultEVSAI2okaysai@2a630000rockchip,rk3576-saiC*c hMN 3mclkhclkhh%txrx% mhdefaultEVSAI3 disabledsai@2a640000rockchip,rk3576-saiC*d hPQ 3mclkhclk``%txrx% mhdefaultEVSAI4 disabledinterrupt-controller@2a701000 arm,gic-400@C*p*p *p@*p`   A+dma-controller@2ab90000arm,pl330arm,primecellC*@ ih 3apb_pclk ! 2dma-controller@2abb0000arm,pl330arm,primecellC*@ ih 3apb_pclk"# hdma-controller@2abd0000arm,pl330arm,primecellC*@ ih 3apb_pclk$% `i2c@2ac40000(rockchip,rk3576-i2crockchip,rk3399-i2cC*hth 3i2cpclk Ydefault+okaypmic@23rockchip,rk806C#5 default             ) 6 C Pdvs1-null-pinsgpio_pwrctrl1 \pin_fun0dvs1-slp-pinsgpio_pwrctrl1 \pin_fun1dvs1-pwrdn-pinsgpio_pwrctrl1 \pin_fun2dvs1-rst-pinsgpio_pwrctrl1 \pin_fun3dvs2-null-pinsgpio_pwrctrl2 \pin_fun0dvs2-slp-pinsgpio_pwrctrl2 \pin_fun1dvs2-pwrdn-pinsgpio_pwrctrl2 \pin_fun2dvs2-rst-pinsgpio_pwrctrl2 \pin_fun3dvs2-dvs-pinsgpio_pwrctrl2 \pin_fun4dvs2-gpio-pinsgpio_pwrctrl2 \pin_fun5dvs3-null-pinsgpio_pwrctrl3 \pin_fun0dvs3-slp-pinsgpio_pwrctrl3 \pin_fun1dvs3-pwrdn-pinsgpio_pwrctrl3 \pin_fun2dvs3-rst-pinsgpio_pwrctrl3 \pin_fun3dvs3-dvs-pinsgpio_pwrctrl3 \pin_fun4dvs3-gpio-pinsgpio_pwrctrl3 \pin_fun5regulatorsdcdc-reg1 e y  dp ~ vdd_cpu_big_s0 0regulator-state-mem dcdc-reg2 y  dp ~ vdd_npu_s0 0regulator-state-mem dcdc-reg3 e y dp ~ vdd_cpu_lit_s0 0 regulator-state-mem   qdcdc-reg4 e y 2Z 2Z vcc_3v3_s3nregulator-state-mem 0 2Zdcdc-reg5 y  dp  vdd_gpu_s0 0Zregulator-state-mem   Pdcdc-reg6 e y vddq_ddr_s0regulator-state-mem dcdc-reg7 e y dp 5 vdd_logic_s0regulator-state-mem dcdc-reg8 e y w@ w@ vcc_1v8_s3regulator-state-mem 0 w@dcdc-reg9 e y vdd2_ddr_s3regulator-state-mem 0dcdc-reg10 e y dp O vdd_ddr_s0regulator-state-mem pldo-reg1 e y w@ w@ vcca_1v8_s0regulator-state-mem pldo-reg2 e y w@ w@ vcca1v8_pldo2_s0regulator-state-mem pldo-reg3 e y O O vdda_1v2_s0regulator-state-mem pldo-reg4 e y 2Z 2Z vcca_3v3_s0regulator-state-mem pldo-reg5 e y w@ 2Z vccio_sd_s0regulator-state-mem pldo-reg6 e y w@ w@ vcca1v8_pldo6_s3regulator-state-mem 0 w@nldo-reg1 e y q q vdd_0v75_s3regulator-state-mem 0  qnldo-reg2 e y P P vdda_ddr_pll_s0regulator-state-mem nldo-reg3 e y | | vdda0v75_hdmi_s0regulator-state-mem nldo-reg4 e y P P vdda_0v85_s0regulator-state-mem nldo-reg5 e y q q vdda_0v75_s0regulator-state-mem i2c@2ac50000(rockchip,rk3576-i2crockchip,rk3399-i2cC*hui 3i2cpclk Zdefault+okayrtc@51haoyu,hym8563CQ&hym8563 default Hi2c@2ac60000(rockchip,rk3576-i2crockchip,rk3399-i2cC*hvj 3i2cpclk [default+ disabledi2c@2ac70000(rockchip,rk3576-i2crockchip,rk3399-i2cC*hwk 3i2cpclk \default+ disabledi2c@2ac80000(rockchip,rk3576-i2crockchip,rk3399-i2cC*hxl 3i2cpclk ]default+okay @audio-codec@1brealtek,rt5616Cu=h=3mclkdefaultEi2c@2ac90000(rockchip,rk3576-i2crockchip,rk3399-i2cC*hym 3i2cpclk ^default+ disabledi2c@2aca0000(rockchip,rk3576-i2crockchip,rk3399-i2cC*hzn 3i2cpclk _default+ disabledi2c@2acb0000(rockchip,rk3576-i2crockchip,rk3399-i2cC*h{o 3i2cpclk `default+ disabledtimer@2acc0000,rockchip,rk3576-timerrockchip,rk3288-timerC* h 3pclktimer -watchdog@2ace0000 rockchip,rk3576-wdtsnps,dw-wdtC*h 3tclkpclk (okayspi@2acf0000(rockchip,rk3576-spirockchip,rk3066-spiC*h3spiclkapb_pclk22%txrx t Vdefault + disabledspi@2ad00000(rockchip,rk3576-spirockchip,rk3066-spiC*h3spiclkapb_pclk22%txrx u Vdefault + disabledspi@2ad10000(rockchip,rk3576-spirockchip,rk3066-spiC*h3spiclkapb_pclkhh%txrx v Vdefault + disabledspi@2ad20000(rockchip,rk3576-spirockchip,rk3066-spiC*h3spiclkapb_pclkhh%txrx w Vdefault + disabledspi@2ad30000(rockchip,rk3576-spirockchip,rk3066-spiC*h3spiclkapb_pclk` ` %txrx x Vdefault + disabledserial@2ad40000&rockchip,rk3576-uartsnps,dw-apb-uartC*h3baudclkapb_pclk22%txrx Ldefaultokayserial@2ad50000&rockchip,rk3576-uartsnps,dw-apb-uartC*h3baudclkapb_pclk2 2 %txrx Ndefault disabledserial@2ad60000&rockchip,rk3576-uartsnps,dw-apb-uartC*h3baudclkapb_pclk2 2 %txrx Odefault disabledserial@2ad70000&rockchip,rk3576-uartsnps,dw-apb-uartC*h3baudclkapb_pclkh h %txrx Pdefault disabledserial@2ad80000&rockchip,rk3576-uartsnps,dw-apb-uartC*h3baudclkapb_pclkh h %txrx Qdefault disabledserial@2ad90000&rockchip,rk3576-uartsnps,dw-apb-uartC*h3baudclkapb_pclkh h%txrx Rdefault disabledserial@2ada0000&rockchip,rk3576-uartsnps,dw-apb-uartC*h3baudclkapb_pclk``%txrx Sdefault disabledserial@2adb0000&rockchip,rk3576-uartsnps,dw-apb-uartC*h3baudclkapb_pclk`` %txrx Tdefault disabledserial@2adc0000&rockchip,rk3576-uartsnps,dw-apb-uartC*h3baudclkapb_pclk` ` %txrx Udefault disabledadc@2ae00000.rockchip,rk3576-saradcrockchip,rk3588-saradcC*h~}3saradcapb_pclk |H saradc-apb ]okay otsadc@2ae70000rockchip,rk3576-tsadcC* {h3tsadcapb_pclkuJKtsadc-apbtsadc {   +sensor@0C  trimsensor@1C  trimsensor@2C  trimsensor@3C  trimsensor@4C  trimsensor@5C  trimi2c@2ae80000(rockchip,rk3576-i2crockchip,rk3399-i2cC*h|p 3i2cpclk adefault+ disabledserial@2afc0000&rockchip,rk3576-uartsnps,dw-apb-uartC*h3baudclkapb_pclk`` Vdefault disabledserial@2afd0000&rockchip,rk3576-uartsnps,dw-apb-uartC*h3baudclkapb_pclk`` Wdefault disabledphy@2b020000rockchip,rk3576-mipi-dcphyC+h 3pclkref m_phyapbgrfs_phyR disabledaphy@2b050000rockchip,rk3576-naneng-combphyC+Rh95 3refapbpipeu9phyapb  okay$phy@2b060000rockchip,rk3576-naneng-combphyC+Rh:6  3refapbpipeu:phyapb  okay*phy@2b010000rockchip,rk3576-usbdp-phyC+Rh-3refclkimmortalpclkutmi(initcmnlanepcs_apbpma_apb  2 C~okay,hdmiphy@2b0000004rockchip,rk3576-hdptx-phyrockchip,rk3588-hdptx-phyC+ h!3refapb& apbinitcmnlaneRokay[sram@3ff88000 mmio-sramC??+rkvdec-sram@0Cscmi-shmem@4010f000arm,scmi-shmemC@chosen Yserial0:1500000n8hdmi-conhdmi-connector e>aportendpointgkeys gpio-keyskey-1 u2  user default Hleds gpio-ledsled-0  \heartbeat '  sys heartbeatdefaultled-1  \lan  led1 netdevdefaultled-2  \lan ' led2 netdevdefaultregulator-usb3-port2-5vregulator-fixed  default LK@ LK@ usb3_port2_5v 0regulator-vcc12v-dcinregulator-fixed e y   vcc12v_dcinregulator-vcc3v3-m2-keymregulator-fixed  default 2Z 2Z vcc3v3_m2_keym (regulator-vcc3v3-sd-s0regulator-fixed  default y 2Z 2Z vcc3v3_sd_s0 nregulator-vcc5v0-sys-s5regulator-fixed e y LK@ LK@ vcc5v0_sys_s5 regulator-vcc5v0-usb-otg0regulator-fixed  default LK@ LK@ vcc5v0_usb_otg0 /regulator-vcc5v-hdmi-txregulator-fixed e LK@ LK@ vcc5v_hdmi_tx regulator-vcc-1v1-nldo-s3regulator-fixed e y   vcc_1v1_nldo_s3 regulator-vcc-2v0-pldo-s3regulator-fixed e y   vcc_2v0_pldo_s3 regulator-vcc-3v3-s0regulator-fixed e y 2Z 2Z vcc_3v3_s0 nsoundsimple-audio-carddefault i2s 'realtek,rt5616-codec5 HeadphonesHPOLHeadphonesHPORIN1PMicrophone Jack0 -HeadphoneHeadphonesMicrophoneMicrophone Jacksimple-audio-card,codecsimple-audio-card,cpu G compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8i2c9serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9serial10serial11spi0spi1spi2spi3spi4ethernet0ethernet1mmc0clock-frequencyclock-output-names#clock-cellscpudevice_typeregenable-methodcapacity-dmips-mhzclocksoperating-points-v2dynamic-power-coefficientcpu-idle-states#cooling-cellscpu-supplyphandleentry-methodarm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uslocal-timer-stopopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsarm,smc-idshmemsimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-dairockchip,grfrangesgpio-controllergpio-rangesinterruptsinterrupt-controller#gpio-cells#interrupt-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsinterrupt-affinitypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicereg-namesbus-rangeclock-namesinterrupt-namesinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speednum-ib-windowsnum-viewportnum-ob-windowsnum-lanesphysphy-namespower-domainsresetsreset-namespinctrl-namespinctrl-0reset-gpiosvpcie3v3-supplydr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirksnps,parkmode-disable-hs-quirksnps,parkmode-disable-ss-quirkextconsnps,dis_rxdet_inp3_quirkdma-coherent#phy-cellsphy-supply#reset-cellsassigned-clocksassigned-clock-parentsassigned-clock-ratesreg-shiftreg-io-widthdmas#power-domain-cellspm_qosmali-supplyiommusrockchip,pmuremote-endpoint#iommu-cellsdma-namesrockchip,sai-rx-route#sound-dai-cellssound-name-prefixrockchip,sai-tx-routerockchip,vo-grfrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsoclock_in_outphy-handlephy-modereset-assert-usreset-deassert-ussnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedm25p,fast-readspi-max-frequencyspi-rx-bus-widthspi-tx-bus-widthvcc-supplyfifo-depthcap-mmc-highspeedcap-sd-highspeeddisable-wpno-mmcno-sdiosd-uhs-sdr104vmmc-supplyvqmmc-supplysupports-cqebitsarm,pl330-periph-burst#dma-cellssystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplyfunctionregulator-always-onregulator-boot-onregulator-enable-ramp-delayregulator-min-microvoltregulator-max-microvoltregulator-nameregulator-ramp-delayregulator-off-in-suspendregulator-suspend-microvoltregulator-on-in-suspendwakeup-sourcenum-cs#io-channel-cellsvref-supply#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritynvmem-cellsnvmem-cell-namesrockchip,pipe-grfrockchip,pipe-phy-grfrockchip,u2phy-grfrockchip,usb-grfrockchip,usbdpphy-grfstdout-pathhdmi-pwr-supplydebounce-intervallabellinux,codecolorlinux,default-triggerenable-active-highvin-supplysimple-audio-card,bitclock-mastersimple-audio-card,hp-det-gpiossimple-audio-card,routingsimple-audio-card,widgetssystem-clock-frequency