8|( ED%pine64,pinephone-prorockchip,rk3399 +7Pine64 PinePhone Pro=handsetaliasesJ/pinctrl/gpio@ff720000P/pinctrl/gpio@ff730000V/pinctrl/gpio@ff780000\/pinctrl/gpio@ff788000b/pinctrl/gpio@ff790000h/i2c@ff3c0000m/i2c@ff110000r/i2c@ff120000w/i2c@ff130000|/i2c@ff3d0000/i2c@ff140000/i2c@ff150000/i2c@ff160000/i2c@ff3e0000/serial@ff180000/serial@ff190000/serial@ff1a0000/serial@ff1b0000/serial@ff370000/spi@ff1c0000/spi@ff1d0000/spi@ff1e0000/spi@ff350000/spi@ff1f0000/spi@ff200000/mmc@fe310000/mmc@fe320000/mmc@fe330000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cpu@0cpuarm,cortex-a53psci &5dO _l@~@   cpu@1cpuarm,cortex-a53psci &5dO _l@~@   cpu@2cpuarm,cortex-a53psci &5dO _l@~@   cpu@3cpuarm,cortex-a53psci &5dO _l@~@   cpu@100cpuarm,cortex-a72psci  &5O _l@~@thermal-idle&'cpu@101cpuarm,cortex-a72psci  &5O _l@~@thermal-idle&'l2-cache-cluster0cache an@ l2-cache-cluster1cache an@idle-states%pscicpu-sleeparm,idle-state2CZxk cluster-sleeparm,idle-state2CZk display-subsystemrockchip,display-subsystem|memory-controllerrockchip,rk3399-dmcdmc_clk disabledpmu_a53arm,cortex-a53-pmupmu_a72arm,cortex-a72-pmupsci arm,psci-1.0smctimerarm,armv8-timer@   xin24m fixed-clockn6xin24mpcie@f8000000rockchip,rk3399-pcie axi-baseapb-basepci+ * Gaclkaclk-perfhclkpm01234syslegacyclientD`Wet |,pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-388(coremgmtmgmt-stickypipepmpclkaclk disabledinterrupt-controller pcie-ep@f8000000rockchip,rk3399-pcie-ep apb-basemem-base Gaclkaclk-perfhclkpm8(coremgmtmgmt-stickypipepmpclkaclk |,pcie-phy-0pcie-phy-1pcie-phy-2pcie-phy-3 default disabledethernet@fe300000rockchip,rk3399-gmac0 4macirq8ighfjfMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac stmmaceth# disabledmmc@fe3100000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc1@@.р Mbiuciuciu-driveciu-sample<yresetokayGQbozdefault  +wifi@1brcm,bcm4329-fmac ! 4host-wakedefault"mmc@fe3200000rockchip,rk3399-dw-mshcrockchip,rk3288-dw-mshc2@A.р  Lbiuciuciu-driveciu-sample<zresetokayGQ #odefault$%&'()mmc@fe330000+rockchip,rk3399-sdhci-5.1arasan,sdhci-5.13 N Nclk_xinclk_ahbemmc_cardclock|* phy_arasanokayG%usb@fe380000 generic-ehci8+|,usb disabledusb@fe3a0000 generic-ohci:+|,usb disabledusb@fe3c0000 generic-ehci<-|.usb disabledusb@fe3e0000 generic-ohci> -|.usb disableddebug@fe430000&arm,coresight-cpu-debugarm,primecellCM apb_pclkdebug@fe432000&arm,coresight-cpu-debugarm,primecellC M apb_pclkdebug@fe434000&arm,coresight-cpu-debugarm,primecellC@M apb_pclkdebug@fe436000&arm,coresight-cpu-debugarm,primecellC`M apb_pclkdebug@fe610000&arm,coresight-cpu-debugarm,primecellaL apb_pclkdebug@fe710000&arm,coresight-cpu-debugarm,primecellqL apb_pclkusb@fe800000rockchip,rk3399-dwc3+0Gref_clksuspend_clkbus_clkaclk_usb3_rksoc_axi_perfaclk_usb3grf_clk% usb3-otg disabledusb@fe800000 snps,dwc3irefbus_earlysuspend4otg|/0usb2-phyusb3-phy Pesaradcapb_pclk saradc-apbokay07crypto@ff8b0000rockchip,rk3399-crypto@hclk_masterhclk_slavesclkmasterslavecrypto-rstcrypto@ff8b8000rockchip,rk3399-crypto@hclk_masterhclk_slavesclkmasterslavecrypto-rsti2c@ff110000rockchip,rk3399-i2cn6AU i2cpclk;default89+okaycamera@1a sony,imx258<:Gdefault; S<_h=s>?portendpoint%@camera-lens@cdongwoon,dw9714 =:camera@36 ovti,ov88586xvclk=GdefaultAB C  S<_ZportendpointDi2c@ff120000rockchip,rk3399-i2cB BV i2cpclk#defaultE+ disabledi2c@ff130000rockchip,rk3399-i2cC CW i2cpclk"defaultF+okaytouchscreen@14goodix,gt1158 G  G  SG HH#6i2c@ff140000rockchip,rk3399-i2cD DX i2cpclk&defaultI+ disabledi2c@ff150000rockchip,rk3399-i2cE EY i2cpclk%defaultJ+ disabledi2c@ff160000rockchip,rk3399-i2cF FZ i2cpclk$defaultK+ disabledserial@ff180000&rockchip,rk3399-uartsnps,dw-apb-uartQ`baudclkapb_pclkcISdefault LMNokay`bluetoothbrcm,bcm4345c5Olpo pC #`default PQR # (Sserial@ff190000&rockchip,rk3399-uartsnps,dw-apb-uartRabaudclkapb_pclkbISdefaultT disabledserial@ff1a0000&rockchip,rk3399-uartsnps,dw-apb-uartSbbaudclkapb_pclkdISdefaultUokayserial@ff1b0000&rockchip,rk3399-uartsnps,dw-apb-uartTcbaudclkapb_pclkeISdefaultV disabledspi@ff1c0000(rockchip,rk3399-spirockchip,rk3066-spiG[spiclkapb_pclkDW W txrxdefaultXYZ[+ disabledspi@ff1d0000(rockchip,rk3399-spirockchip,rk3066-spiH\spiclkapb_pclk5W W txrxdefault\]^_+okayflash@0jedec,spi-norSspi@ff1e0000(rockchip,rk3399-spirockchip,rk3066-spiI]spiclkapb_pclk4WWtxrxdefault`abc+ disabledspi@ff1f0000(rockchip,rk3399-spirockchip,rk3066-spiJ^spiclkapb_pclkCWWtxrxdefaultdefg+ disabledspi@ff200000(rockchip,rk3399-spirockchip,rk3066-spi K_spiclkapb_pclkhh txrxdefaultijkl+ disabledthermal-zonescpu-thermald mtripscpu_alert0)Epassivencpu_alert1 )Epassiveocpu_crits) Ecriticalcooling-mapsmap04n9map14oH9gpu-thermald mtripsgpu_alert0$)Epassivepgpu_crits) Ecriticalcooling-mapsmap04p 9qtsadc@ff260000rockchip,rk3399-tsadc&aO qOdtsadcapb_pclk tsadc-apbHsinitdefaultsleepr_sirsokaymqos@ffa58000rockchip,rk3399-qossyscon {qos@ffa5c000rockchip,rk3399-qossyscon |qos@ffa60080rockchip,rk3399-qossyscon qos@ffa60100rockchip,rk3399-qossyscon qos@ffa60180rockchip,rk3399-qossyscon qos@ffa70000rockchip,rk3399-qossyscon qos@ffa70080rockchip,rk3399-qossyscon qos@ffa74000rockchip,rk3399-qossyscon@ }qos@ffa76000rockchip,rk3399-qossyscon` ~qos@ffa90000rockchip,rk3399-qossyscon qos@ffa98000rockchip,rk3399-qossyscon tqos@ffaa0000rockchip,rk3399-qossyscon qos@ffaa0080rockchip,rk3399-qossyscon qos@ffaa8000rockchip,rk3399-qossyscon qos@ffaa8080rockchip,rk3399-qossyscon qos@ffab0000rockchip,rk3399-qossyscon uqos@ffab0080rockchip,rk3399-qossyscon vqos@ffab8000rockchip,rk3399-qossyscon wqos@ffac0000rockchip,rk3399-qossyscon xqos@ffac0080rockchip,rk3399-qossyscon yqos@ffac8000rockchip,rk3399-qossyscon qos@ffac8080rockchip,rk3399-qossyscon qos@ffad0000rockchip,rk3399-qossyscon qos@ffad8080rockchip,rk3399-qossyscon qos@ffae0000rockchip,rk3399-qossyscon zpower-management@ff310000&rockchip,rk3399-pmusysconsimple-mfd1power-controller!rockchip,rk3399-power-controller+power-domain@34"tpower-domain@33!uvpower-domain@31wpower-domain@32  xypower-domain@35#zpower-domain@25lpower-domain@23{power-domain@22f|power-domain@27L}power-domain@28~power-domain@8~}power-domain@9 power-domain@24power-domain@15+power-domain@21rpower-domain@19power-domain@20power-domain@16+power-domain@17power-domain@18syscon@ff320000)rockchip,rk3399-pmugrfsysconsimple-mfd2io-domains&rockchip,rk3399-pmu-io-voltage-domainokaySspi@ff350000(rockchip,rk3399-spirockchip,rk3066-spi5spiclkapb_pclk<default+ disabledserial@ff370000&rockchip,rk3399-uartsnps,dw-apb-uart7"baudclkapb_pclkfISdefault disabledi2c@ff3c0000rockchip,rk3399-i2c<    i2cpclk9default+okaypmic@1crockchip,rk818 <xin32krk808-clkout2default   # / ; G( S _(OregulatorsDCDC_REG1 kvdd_cpu_l z  Y  q regulator-state-mem DCDC_REG2 kvdd_center z  5 B@ qregulator-state-mem DCDC_REG3 kvcc_ddr z regulator-state-mem DCDC_REG4 kvcc_1v8 z  w@ w@Sregulator-state-mem LDO_REG1 kvcca3v0_codec - -LDO_REG2 kvcc3v0_touch - -HLDO_REG3 kvcca1v8_codec z  w@ w@LDO_REG4 krk818_pwr_on z  2Z 2Zregulator-state-mem LDO_REG5 kvcc_3v0 z  - -regulator-state-mem LDO_REG6 kvcc_1v5 z  ` `regulator-state-mem LDO_REG7 kvcc1v8_dvp w@ w@=LDO_REG8 kvcc3v3_s3 z  2Z 2Zregulator-state-mem LDO_REG9 kvccio_sd w@ 2Z)SWITCH_REG kvcc3v3_s0 z regulator-state-mem regulator@40silergy,syr827@ default kvdd_cpu_b Y 0  z regulator-state-mem regulator@41silergy,syr828A default kvdd_gpu Y   z regulator-state-mem i2c@ff3d0000rockchip,rk3399-i2c=    i2cpclk8default+okayXmpu6500@68invensense,mpu6500h <Si2c@ff3e0000rockchip,rk3399-i2c>    i2cpclk:default+ disabledpwm@ff420000(rockchip,rk3399-pwmrockchip,rk3288-pwmB 3defaultokaypwm@ff420010(rockchip,rk3399-pwmrockchip,rk3288-pwmB 3default disabledpwm@ff420020(rockchip,rk3399-pwmrockchip,rk3288-pwmB  3default disabledpwm@ff420030(rockchip,rk3399-pwmrockchip,rk3288-pwmB0 3default disableddfi@ff630000c@rockchip,rk3399-dfiy pclk_ddr_monvideo-codec@ff650000rockchip,rk3399-vpue rq 4vepuvdpu aclkhclk >iommu@ff650800rockchip,iommue@s aclkiface Evideo-codec@ff660000rockchip,rk3399-vdecft axiahbcabaccore > iommu@ff660480rockchip,iommu f@f@u aclkiface  Eiommu@ff670800rockchip,iommug@* aclkiface E disabledrga@ff680000rockchip,rk3399-rgah7maclkhclksclkjgi coreaxiahb!efuse@ff690000rockchip,rk3399-efusei+} pclk_efusecpu-id@7cpu-leakage@17gpu-leakage@18center-leakage@19cpu-leakage@1alogic-leakage@1bwafer-info@1cdma-controller@ff6d0000arm,pl330arm,primecellm@  R ] apb_pclkhdma-controller@ff6e0000arm,pl330arm,primecelln@  R ] apb_pclkWclock-controller@ff750000rockchip,rk3399-pmucruuxin24m t(Jclock-controller@ff760000rockchip,rk3399-cruvxin24m t@BCxD#g/;рxh<4`#Fׄׄ ׄsyscon@ff770000&rockchip,rk3399-grfsysconsimple-mfdw+io-domains"rockchip,rk3399-io-voltage-domainokay =  ) mipi-dphy-rx0rockchip,rk3399-mipi-dphy-rx0wodphy-refdphy-cfggrf okayusb2phy@e450rockchip,rk3399-usb2phyP{phyclkclk_usbphy0_480m disabled+host-port  4linestate disabled,otg-port 0ghj4otg-bvalidotg-idlinestate disabled/usb2phy@e460rockchip,rk3399-usb2phy`|phyclkclk_usbphy1_480m disabled-host-port  4linestate disabled.otg-port 0lmo4otg-bvalidotg-idlinestate disabled1phy@f780rockchip,rk3399-emmc-phy$emmcclk 2 okay*pcie-phyrockchip,rk3399-pcie-phyrefclk phy disabledphy@ff7c0000rockchip,rk3399-typec-phy|~}tcpdcoretcpdphy-ref~Luphyuphy-pipeuphy-tcphy disableddp-port 3usb3-port 0phy@ff800000rockchip,rk3399-typec-phytcpdcoretcpdphy-ref Muphyuphy-pipeuphy-tcphy disableddp-port 4usb3-port 2watchdog@ff848000 rockchip,rk3399-wdtsnps,dw-wdt|xrktimer@ff850000rockchip,rk3399-timerQhZ pclktimerspdif@ff870000rockchip,rk3399-spdifBhtx mclkhclkUdefault disabledi2s@ff880000(rockchip,rk3399-i2srockchip,rk3066-i2s'hhtxrxi2s_clki2s_hclkVbclk_onbclk_off_ disabledi2s@ff890000(rockchip,rk3399-i2srockchip,rk3066-i2s(hhtxrxi2s_clki2s_hclkWdefault disabledi2s@ff8a0000(rockchip,rk3399-i2srockchip,rk3066-i2s)hhtxrxi2s_clki2s_hclkX disabledvop@ff8f0000rockchip,rk3399-vop-lit w ׄaclk_vopdclk_vophclk_vop > axiahbdclkokay port+endpoint@0endpoint@1endpoint@2endpoint@3endpoint@46iommu@ff8f3f00rockchip,iommu?w aclkiface Eokayvop@ff900000rockchip,rk3399-vop-big v ׄaclk_vopdclk_vophclk_vop > axiahbdclkokay port+endpoint@0endpoint@1endpoint@2endpoint@3endpoint@45iommu@ff903f00rockchip,iommu?v aclkiface Eokayisp0@ff910000rockchip,rk3399-cif-isp@+nispaclkhclk >|dphyokayports+port@0+endpoint@0Diommu@ff914000rockchip,iommu @P+ aclkiface E okayisp1@ff920000rockchip,rk3399-cif-isp@,oispaclkhclk >|dphyokayports+port@0+endpoint@0@iommu@ff924000rockchip,iommu @P, aclkiface E okayhdmi-soundsimple-audio-card i2s " regulator-vcc3v3-sysregulator-fixed kvcc3v3_sys z  2Z 2Z (regulator-vcc1v8-s3regulator-fixed kvcca1v8_s3 w@ w@ ( z 7regulator-vcc1v8-codecregulator-fixed  Gdefault kvcc1v8_codec w@ w@ (regulator-vcc1v2-dvpregulator-fixed kvcc1v2_dvp z  O O 7?sdio-wifi-pwrseqmmc-pwrseq-simpleO ext_clockdefault n %' S# regulator-vcc1v8-lcdregulator-fixed  kvcc1v8_lcd w@ w@ ( Gregulator-vcc2v8-lcdregulator-fixed  kvcc2v8_lcd * * ( Gvibratorgpio-vibrator 8G ( compatibleinterrupt-parent#address-cells#size-cellsmodelchassis-typegpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4spi0spi1spi2spi3spi4spi5mmc0mmc1mmc2cpudevice_typeregenable-methodcapacity-dmips-mhzclocks#cooling-cellsdynamic-power-coefficientcpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheoperating-points-v2cpu-supplyphandleduration-usexit-latency-uscache-levelcache-unifiedentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usmin-residency-usportsrockchip,pmudevfreq-eventsclock-namesstatusinterruptsarm,no-tick-in-suspendclock-frequencyclock-output-names#clock-cellsreg-names#interrupt-cellsaspm-no-l0sbus-rangeinterrupt-namesinterrupt-map-maskinterrupt-mapmax-link-speedmsi-mapphysphy-namesrangesresetsreset-namesinterrupt-controllermax-functionsnum-lanesrockchip,max-outbound-regionspinctrl-namespinctrl-0power-domainsrockchip,grfsnps,txpblmax-frequencyfifo-depthbus-widthcap-sd-highspeedcap-sdio-irqdisable-wpkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr104assigned-clocksassigned-clock-ratescd-gpiosvmmc-supplyvqmmc-supplyarasan,soc-ctl-syscondisable-cqe-dcmdmmc-hs200-1_8vdr_modephy_typesnps,dis_enblslpm_quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirk#sound-dai-cellsremote-endpointmsi-controller#msi-cellsaffinity#io-channel-cellsvref-supplylens-focusorientationreset-gpiosrotationvif-supplyvana-supplyvdig-supplydata-laneslink-frequenciesvcc-supplydovdd-supplypowerdown-gpiosi2c-scl-rising-time-nsi2c-scl-falling-time-nsirq-gpiosAVDD28-supplyVDDIO-supplytouchscreen-size-xtouchscreen-size-yreg-shiftreg-io-widthuart-has-rtsctsdevice-wakeup-gpioshost-wakeup-gpiosmax-speedshutdown-gpiosvbat-supplyvddio-supplydmasdma-namesspi-max-frequencypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#power-domain-cellspm_qospmu1830-supplysystem-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendfcs,suspend-voltage-selector#pwm-cellsiommus#iommu-cells#dma-cellsarm,pl330-periph-burst#reset-cellsbt656-supplyaudio-supplysdmmc-supplygpio1830-supply#phy-cellsdrive-impedance-ohmassigned-clock-parentsrockchip,disable-mmu-resetsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namesound-daiclock-masterbacklightiovcc-supplymali-supplygpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltpwmsdebounce-intervalcolorfunctionledsvin-supplyenable-active-highgpiopost-power-on-delay-mspower-off-delay-usenable-gpios