O8y(_yarmsom,sige1rockchip,rk3528 + 7ArmSoM Sige1aliases=/pinctrl/gpio@ff610000C/pinctrl/gpio@ffaf0000I/pinctrl/gpio@ffb00000O/pinctrl/gpio@ffb10000U/pinctrl/gpio@ffb20000[/soc/ethernet@ffbe0000e/soc/i2c@ffa50000j/soc/mmc@ffbf0000o/soc/mmc@ffc30000t/soc/mmc@ffc10000y/soc/serial@ff9f0000/soc/serial@ffa00000cpus+cpu-mapcluster0core0core1core2core3cpu@0arm,cortex-a53cpupscicpu@1arm,cortex-a53cpupscicpu@2arm,cortex-a53cpupscicpu@3arm,cortex-a53cpupscifirmwarescmi arm,scmi-smcق +protocol@14opp-table-cpuoperating-points-v2opp-1200000000G  Y Y@opp-1416000000Tfr  HH@opp-1608000000_"  @opp-1800000000kI  ԼԼ@opp-2016000000x)  @opp-table-gpuoperating-points-v2-opp-300000000  Y YB@(opp-500000000e  Y YB@opp-600000000#F  Y YB@opp-700000000)'  B@opp-800000000/  ~~B@pinctrlrockchip,rk3528-pinctrl4 +A gpio@ff610000rockchip,gpio-banka r s HGSco {gpio@ffaf0000rockchip,gpio-bank  HISco { 5gpio@ffb00000rockchip,gpio-bank $ % HKSco @ { gpio@ffb10000rockchip,gpio-bank  HLSco ` { 4gpio@ffb20000rockchip,gpio-bank  HNSco { <pcfg-pull-uppcfg-pull-downpcfg-pull-nonepcfg-pull-none-drv-level-0pcfg-pull-none-drv-level-2pcfg-pull-up-drv-level-2pcfg-pull-none-smtarmclkclkm1-32k-outuemmcemmc-bus8Uemmc-clkVemmc-cmdWemmc-strbXethfephyfephym0-led-linkHfephym0-led-spdIfspigpuhdmihsmi2c0i2c0m0-xfer ;i2c1i2c2i2c2m1-xfer >i2c3i2c4i2c4-xfer ?i2c5i2c6i2c7i2c7-xfer @i2s0i2s1jtagpciepdmpmupwm0pwm1pwm2pwm2m0-pinsApwm3pwm3m0-pinsBpwm4pwm5pwm6pwm7pwrrefrgmiirgmii-miim Orgmii-rx-bus20Qrgmii-tx-bus20Prgmii-rgmii-clk Rrgmii-rgmii-bus@ Sscrsdio0sdio0-bus4@Ysdio0-clkZsdio0-cmd[sdio1sdio1-bus4@ ^sdio1-clk_sdio1-cmd`sdmmcsdmmc-bus4@asdmmc-clkbsdmmc-cmdcsdmmc-detdsdmmc-vol-ctrl-hqsdmmc-pwren-lmspdifspi0spi1tsi0tsi1uart0uart0m0-xfer 0uart1uart2uart2m1-xfer  1uart2m1-ctsn 2uart2m1-rtsn 3uart3uart4uart5uart6uart7bluetoothbt-reg-on-h6bt-wake-host-h7host-wake-bt-h8ethernetgmac1-rstn-l Tledsg-led ir-led jrtcrtc-int-l=usbusb20-host1-drv-h nusb20-host2-drv-housb20-otg0-drv-h pwifiwifi-reg-on-htwifi-wake-host-h]psciarm,psci-1.0arm,psci-0.2smcreserved-memory+Ashmem@10f000arm,scmi-shmem  timerarm,armv8-timer0H   clock-xin24m fixed-clockn6!xin24mclock-gmac50m fixed-clock!gmac0soc simple-busA+interrupt-controller@fed01000 arm,gic-400@ @ `  H {qos@ff200000rockchip,rk3528-qossyscon qos@ff200080rockchip,rk3528-qossyscon qos@ff200100rockchip,rk3528-qossyscon  qos@ff200200rockchip,rk3528-qossyscon  qos@ff200280rockchip,rk3528-qossyscon  qos@ff200300rockchip,rk3528-qossyscon  qos@ff200380rockchip,rk3528-qossyscon  qos@ff210000rockchip,rk3528-qossyscon! qos@ff210080rockchip,rk3528-qossyscon! qos@ff220000rockchip,rk3528-qossyscon" qos@ff220080rockchip,rk3528-qossyscon" qos@ff240000rockchip,rk3528-qossyscon$ qos@ff250000rockchip,rk3528-qossyscon% qos@ff260000rockchip,rk3528-qossyscon& qos@ff270000rockchip,rk3528-qossyscon' qos@ff270080rockchip,rk3528-qossyscon' qos@ff270100rockchip,rk3528-qossyscon' qos@ff270200rockchip,rk3528-qossyscon' qos@ff270280rockchip,rk3528-qossyscon' qos@ff270300rockchip,rk3528-qossyscon'  qos@ff270380rockchip,rk3528-qossyscon' !qos@ff270480rockchip,rk3528-qossyscon' "qos@ff270500rockchip,rk3528-qossyscon' #qos@ff280000rockchip,rk3528-qossyscon( $qos@ff280080rockchip,rk3528-qossyscon( %qos@ff280100rockchip,rk3528-qossyscon( &qos@ff280180rockchip,rk3528-qossyscon( 'qos@ff280200rockchip,rk3528-qossyscon( (qos@ff280280rockchip,rk3528-qossyscon( )qos@ff280300rockchip,rk3528-qossyscon( *qos@ff280380rockchip,rk3528-qossyscon( +qos@ff280400rockchip,rk3528-qossyscon( ,syscon@ff340000rockchip,rk3528-vpu-grfsyscon4Jsyscon@ff348000$rockchip,rk3528-pipe-phy-grfsyscon4gsyscon@ff360000rockchip,rk3528-vo-grfsyscon6Dclock-controller@ff4a0000rockchip,rk3528-cruJ4 t          z y  LLDFq;;]Q沀eр Cׄ#FsY@e Yxin24mgmac0e syscon@ff540000rockchip,rk3528-ioc-grfsysconT power-management@ff600000&rockchip,rk3528-pmusysconsimple-mfd` power-controller!rockchip,rk3528-power-controllerr+ power-domain@4 rpower-domain@5r disabledpower-domain@6rpower-domain@7$ !"#rpower-domain@8$$%&'()*+,rgpu@ff700000"rockchip,rk3528-maliarm,mali-450p4 D@  YbuscoreTHXYV\]Z["gpgpmmupppp0ppmmu0pp1ppmmu1-  wokay.spi@ff9c0000(rockchip,rk3528-spirockchip,rk3066-spi Yspiclkapb_pclk H//txrx + disabledspi@ff9d0000(rockchip,rk3528-spirockchip,rk3066-spi Yspiclkapb_pclk H//txrx + disabledserial@ff9f0000&rockchip,rk3528-uartsnps,dw-apb-uart  kYbaudclkapb_pclk H(/ /okaydefault0serial@ff9f8000&rockchip,rk3528-uartsnps,dw-apb-uart  Ybaudclkapb_pclk H)/ /   disabledserial@ffa00000&rockchip,rk3528-uartsnps,dw-apb-uart  Ybaudclkapb_pclk H*/ /  okaytxrxdefault 123bluetoothbrcm,bcm43438-bt uYlpo 4 5H host-wakeupdefault 678 5(94:serial@ffa08000&rockchip,rk3528-uartsnps,dw-apb-uart  Ybaudclkapb_pclk H+//  disabledserial@ffa10000&rockchip,rk3528-uartsnps,dw-apb-uart  1Ybaudclkapb_pclk H,//  disabledserial@ffa18000&rockchip,rk3528-uartsnps,dw-apb-uart " Ybaudclkapb_pclk H-//  disabledserial@ffa20000&rockchip,rk3528-uartsnps,dw-apb-uart % Ybaudclkapb_pclk H.//  disabledserial@ffa28000&rockchip,rk3528-uartsnps,dw-apb-uart ( Ybaudclkapb_pclk H///  disabledi2c@ffa50000(rockchip,rk3528-i2crockchip,rk3399-i2c  Yi2cpclk H= +okaydefault;rtc@51haoyu,hym8563Q <Hdefault=Ai2c@ffa58000(rockchip,rk3528-i2crockchip,rk3399-i2c  Yi2cpclk H> + disabledi2c@ffa60000(rockchip,rk3528-i2crockchip,rk3399-i2c j i Yi2cpclk H?default>+ disabledi2c@ffa68000(rockchip,rk3528-i2crockchip,rk3399-i2c  Yi2cpclk H@ + disabledi2c@ffa70000(rockchip,rk3528-i2crockchip,rk3399-i2c 3 2 Yi2cpclk HAdefault? + disabledi2c@ffa78000(rockchip,rk3528-i2crockchip,rk3399-i2c  Yi2cpclk HB + disabledi2c@ffa80000(rockchip,rk3528-i2crockchip,rk3399-i2c  Yi2cpclk HC + disabledi2c@ffa88000(rockchip,rk3528-i2crockchip,rk3399-i2c 5 4 Yi2cpclk HDdefault@ + disabledpwm@ffa90000(rockchip,rk3528-pwmrockchip,rk3328-pwm o n YpwmpclkO disabledpwm@ffa90010(rockchip,rk3528-pwmrockchip,rk3328-pwm o n YpwmpclkO disabledpwm@ffa90020(rockchip,rk3528-pwmrockchip,rk3328-pwm  o n YpwmpclkOokaydefaultAspwm@ffa90030(rockchip,rk3528-pwmrockchip,rk3328-pwm0 o n YpwmpclkOokaydefaultBrpwm@ffa98000(rockchip,rk3528-pwmrockchip,rk3328-pwm r q YpwmpclkO disabledpwm@ffa98010(rockchip,rk3528-pwmrockchip,rk3328-pwm r q YpwmpclkO disabledpwm@ffa98020(rockchip,rk3528-pwmrockchip,rk3328-pwm  r q YpwmpclkO disabledpwm@ffa98030(rockchip,rk3528-pwmrockchip,rk3328-pwm0 r q YpwmpclkO disabledadc@ffae0000rockchip,rk3528-saradc Ysaradcapb_pclk H  o Zsaradc-apbfokayx:hethernet@ffbd0000&rockchip,rk3528-gmacsnps,dwmac-4.20a0      >Ystmmacethclk_mac_refmac_clk_rxmac_clk_txpclk_macaclk_macHqtmacirqeth_wake_irqCrmii   Zstmmaceth4DEFG disabledmdiosnps,dwmac-mdio+ethernet-phy@2ethernet-phy-ieee802.3-c22 "defaultHI Cstmmac-axi-configErx-queues-config$Fqueue0tx-queues-config:Gqueue0ethernet@ffbe0000&rockchip,rk3528-gmacsnps,dwmac-4.20a (Ystmmacethclk_mac_refpclk_macaclk_macHy|macirqeth_wake_irq  a Zstmmaceth4JKLMokayPoutputN rgmii-id]9defaultOPQRSmdiosnps,dwmac-mdio+ethernet-phy@1ethernet-phy-ieee802.3-c22defaultThN x < Nstmmac-axi-configKrx-queues-config$Lqueue0tx-queues-config:Mqueue0mmc@ffbf00000rockchip,rk3528-dwcmshcrockchip,rk3588-dwcmshc4  D n6 ( Ycorebusaxiblocktimer H defaultUVWX ( A B C D EZcorebusaxiblocktimerokay9:mmc@ffc100000rockchip,rk3528-dw-mshcrockchip,rk3288-dw-mshc@  Ybiuciuciu-driveciu-sample H default YZ[  gZresetokay -C\NU9:+wifi@1brcm,bcm4329-fmac uYlpo 5H host-wakedefault]mmc@ffc200000rockchip,rk3528-dw-mshcrockchip,rk3288-dw-mshc@  Ybiuciuciu-driveciu-sample H default ^_`  hZreset disabledmmc@ffc300000rockchip,rk3528-dw-mshcrockchip,rk3288-dw-mshc@ ( '  Ybiuciuciu-driveciu-sample Hрdefaultabcd  ZresetcZokayUefdma-controller@ffd60000arm,pl330arm,primecell@ ^ Yapb_pclklH/phy@ffdc0000rockchip,rk3528-naneng-combphy4 {D {  Yrefapbpipe  c eZphyapbJg disabledchosenserial0:1500000n8adc-keys adc-keyshbuttons w@$dbutton-maskrom2MASKROM8Cleds gpio-ledsdefaultijled-0]con qheartbeat 4  zheartbeatled-1]conqstatus 4  zdefault-onregulator-0v6-vcc-ddrregulator-fixed vcc0v6_ddr ' 'kregulator-0v9-vddregulator-fixedvdd_0v9  kregulator-1v1-vcc-ddrregulator-fixedvcc_ddrkregulator-1v8-vccregulator-fixedvcc_1v8w@w@9:regulator-1v8-vcc-ddrregulator-fixed vcc1v8_ddrw@w@kregulator-3v3-vccregulator-fixedvcc_3v32Z2Zl9regulator-3v3-vcc-sdregulator-fixed <defaultm vcc3v3_sd2Z2Z9eregulator-5v0-vcc-sysregulator-fixed vcc5v0_sysLK@LK@lkregulator-5v0-vcc-usb1-hostregulator-fixed < defaultnvcc5v0_usb1_hostLK@LK@kregulator-5v0-vcc-usb2-hostregulator-fixed <defaultovcc5v0_usb2_hostLK@LK@kregulator-5v0-vcc-usb-otgregulator-fixed 5 defaultpvcc5v0_usb_otgLK@LK@kregulator-vcc-dcinregulator-fixed vcc_dcinlregulator-vccio-sdregulator-gpio <defaultq vccio_sdw@2Zw@2Zkfregulator-vdd-armpwm-regulatorrkvdd_arm bSh*regulator-vdd-logicpwm-regulatorsk vdd_logic Y*.sdio-pwrseqmmc-pwrseq-simpledefaulttuH 5\ compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4ethernet0i2c0mmc0mmc1mmc2serial0serial2cpuregdevice_typeenable-methodclocksoperating-points-v2cpu-supplyphandlearm,smc-idshmem#clock-cellsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendrockchip,grfrangesinterruptsgpio-controller#gpio-cellsgpio-rangesinterrupt-controller#interrupt-cellspower-domainsbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsno-mapclock-frequencyclock-output-namesassigned-clocksassigned-clock-ratesclock-names#reset-cells#power-domain-cellspm_qosstatusinterrupt-namesresetsmali-supplydmasdma-namesreg-io-widthreg-shiftpinctrl-namespinctrl-0uart-has-rtsctsdevice-wakeup-gpiosshutdown-gpiosvbat-supplyvddio-supplywakeup-source#pwm-cellsreset-names#io-channel-cellsvref-supplyphy-handlephy-modesnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsophy-is-integratedsnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useclock_in_outphy-supplyreset-assert-usreset-deassert-usreset-gpiosmax-frequencybus-widthcap-mmc-highspeedmmc-hs200-1_8vno-sdno-sdionon-removablevmmc-supplyvqmmc-supplyfifo-depthcap-sd-highspeedcap-sdio-irqkeep-power-in-suspendmmc-pwrseqno-mmcsd-uhs-sdr104rockchip,default-sample-phasedisable-wp#dma-cellsarm,pl330-periph-burst#phy-cellsrockchip,pipe-grfrockchip,pipe-phy-grfstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltcolordefault-statefunctionlinux,default-triggerregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltvin-supplyenable-active-highstatespwmspwm-supplyregulator-settling-time-up-uspost-power-on-delay-ms