Namespaces
	gr

	gr::dvbs2rx

Typedefs
typedef gr::dvbs2rx::dvbt2_rotation_t	dvbt2_rotation_t

typedef gr::dvbs2rx::dvbt2_streamtype_t	dvbt2_streamtype_t

typedef gr::dvbs2rx::dvbt2_inputmode_t	dvbt2_inputmode_t

typedef gr::dvbs2rx::dvbt2_extended_carrier_t	dvbt2_extended_carrier_t

typedef gr::dvbs2rx::dvbt2_preamble_t	dvbt2_preamble_t

typedef gr::dvbs2rx::dvbt2_fftsize_t	dvbt2_fftsize_t

typedef gr::dvbs2rx::dvbt2_papr_t	dvbt2_papr_t

typedef gr::dvbs2rx::dvbt2_l1constellation_t	dvbt2_l1constellation_t

typedef gr::dvbs2rx::dvbt2_pilotpattern_t	dvbt2_pilotpattern_t

typedef gr::dvbs2rx::dvbt2_version_t	dvbt2_version_t

typedef gr::dvbs2rx::dvbt2_reservedbiasbits_t	dvbt2_reservedbiasbits_t

typedef gr::dvbs2rx::dvbt2_l1scrambled_t	dvbt2_l1scrambled_t

typedef gr::dvbs2rx::dvbt2_misogroup_t	dvbt2_misogroup_t

typedef gr::dvbs2rx::dvbt2_showlevels_t	dvbt2_showlevels_t

typedef gr::dvbs2rx::dvbt2_inband_t	dvbt2_inband_t

typedef gr::dvbs2rx::dvbt2_equalization_t	dvbt2_equalization_t

typedef gr::dvbs2rx::dvbt2_bandwidth_t	dvbt2_bandwidth_t

Enumerations
enum	gr::dvbs2rx::dvbt2_rotation_t { gr::dvbs2rx::ROTATION_OFF = 0, gr::dvbs2rx::ROTATION_ON }

enum	gr::dvbs2rx::dvbt2_streamtype_t { gr::dvbs2rx::STREAMTYPE_TS = 0, gr::dvbs2rx::STREAMTYPE_GS, gr::dvbs2rx::STREAMTYPE_BOTH }

enum	gr::dvbs2rx::dvbt2_inputmode_t { gr::dvbs2rx::INPUTMODE_NORMAL = 0, gr::dvbs2rx::INPUTMODE_HIEFF }

enum	gr::dvbs2rx::dvbt2_extended_carrier_t { gr::dvbs2rx::CARRIERS_NORMAL = 0, gr::dvbs2rx::CARRIERS_EXTENDED }

enum	gr::dvbs2rx::dvbt2_preamble_t { gr::dvbs2rx::PREAMBLE_T2_SISO = 0, gr::dvbs2rx::PREAMBLE_T2_MISO, gr::dvbs2rx::PREAMBLE_NON_T2, gr::dvbs2rx::PREAMBLE_T2_LITE_SISO, gr::dvbs2rx::PREAMBLE_T2_LITE_MISO }

enum	gr::dvbs2rx::dvbt2_fftsize_t { gr::dvbs2rx::FFTSIZE_2K = 0, gr::dvbs2rx::FFTSIZE_8K, gr::dvbs2rx::FFTSIZE_4K, gr::dvbs2rx::FFTSIZE_1K, gr::dvbs2rx::FFTSIZE_16K, gr::dvbs2rx::FFTSIZE_32K, gr::dvbs2rx::FFTSIZE_8K_T2GI, gr::dvbs2rx::FFTSIZE_32K_T2GI, gr::dvbs2rx::FFTSIZE_16K_T2GI = 11 }

enum	gr::dvbs2rx::dvbt2_papr_t { gr::dvbs2rx::PAPR_OFF = 0, gr::dvbs2rx::PAPR_ACE, gr::dvbs2rx::PAPR_TR, gr::dvbs2rx::PAPR_BOTH }

enum	gr::dvbs2rx::dvbt2_l1constellation_t { gr::dvbs2rx::L1_MOD_BPSK = 0, gr::dvbs2rx::L1_MOD_QPSK, gr::dvbs2rx::L1_MOD_16QAM, gr::dvbs2rx::L1_MOD_64QAM }

enum	gr::dvbs2rx::dvbt2_pilotpattern_t { gr::dvbs2rx::PILOT_PP1 = 0, gr::dvbs2rx::PILOT_PP2, gr::dvbs2rx::PILOT_PP3, gr::dvbs2rx::PILOT_PP4, gr::dvbs2rx::PILOT_PP5, gr::dvbs2rx::PILOT_PP6, gr::dvbs2rx::PILOT_PP7, gr::dvbs2rx::PILOT_PP8 }

enum	gr::dvbs2rx::dvbt2_version_t { gr::dvbs2rx::VERSION_111 = 0, gr::dvbs2rx::VERSION_121, gr::dvbs2rx::VERSION_131 }

enum	gr::dvbs2rx::dvbt2_reservedbiasbits_t { gr::dvbs2rx::RESERVED_OFF = 0, gr::dvbs2rx::RESERVED_ON }

enum	gr::dvbs2rx::dvbt2_l1scrambled_t { gr::dvbs2rx::L1_SCRAMBLED_OFF = 0, gr::dvbs2rx::L1_SCRAMBLED_ON }

enum	gr::dvbs2rx::dvbt2_misogroup_t { gr::dvbs2rx::MISO_TX1 = 0, gr::dvbs2rx::MISO_TX2 }

enum	gr::dvbs2rx::dvbt2_showlevels_t { gr::dvbs2rx::SHOWLEVELS_OFF = 0, gr::dvbs2rx::SHOWLEVELS_ON }

enum	gr::dvbs2rx::dvbt2_inband_t { gr::dvbs2rx::INBAND_OFF = 0, gr::dvbs2rx::INBAND_ON }

enum	gr::dvbs2rx::dvbt2_equalization_t { gr::dvbs2rx::EQUALIZATION_OFF = 0, gr::dvbs2rx::EQUALIZATION_ON }

enum	gr::dvbs2rx::dvbt2_bandwidth_t { gr::dvbs2rx::BANDWIDTH_1_7_MHZ = 0, gr::dvbs2rx::BANDWIDTH_5_0_MHZ, gr::dvbs2rx::BANDWIDTH_6_0_MHZ, gr::dvbs2rx::BANDWIDTH_7_0_MHZ, gr::dvbs2rx::BANDWIDTH_8_0_MHZ, gr::dvbs2rx::BANDWIDTH_10_0_MHZ }