18 #ifndef GNSS_SDR_BASE_PCPS_ACQUISITION_FPGA_H 19 #define GNSS_SDR_BASE_PCPS_ACQUISITION_FPGA_H 25 #include <gnuradio/runtime_types.h> 26 #include <volk_gnsssdr/volk_gnsssdr_alloc.h> 50 double code_length_chips,
51 uint32_t opt_acq_fs_sps,
52 uint32_t default_fpga_blk_exp,
54 unsigned int in_streams,
55 unsigned int out_streams);
59 inline std::string role()
override final {
return role_; }
61 inline size_t item_size()
override {
return sizeof(int16_t); }
64 void connect(gr::top_block_sptr top_block)
override;
65 void disconnect(gr::top_block_sptr top_block)
override;
66 gr::basic_block_sptr get_left_block()
override;
67 gr::basic_block_sptr get_right_block()
override;
69 signed int mag()
override;
70 void set_gnss_synchro(
Gnss_Synchro* p_gnss_synchro)
override;
71 void set_channel(
unsigned int channel)
override;
72 void set_channel_fsm(std::weak_ptr<ChannelFsm> channel_fsm)
override;
73 void set_doppler_center(
int doppler_center)
override;
74 void reset()
override;
75 void stop_acquisition()
override;
76 void set_resampler_latency(uint32_t latency_samples __attribute__((unused)))
override {}
77 void set_local_code()
override;
81 static const uint32_t QUANT_BITS_LOCAL_CODE = 16;
82 static const uint32_t SELECT_LSBITS = 0x0000FFFF;
83 static const uint32_t SELECT_MSBITS = 0xFFFF0000;
84 static const uint32_t SELECT_ALL_CODE_BITS = 0xFFFFFFFF;
85 static const uint32_t SHL_CODE_BITS = 65536;
86 static const uint32_t ACQ_BUFF_0 = 0;
87 static const uint32_t ACQ_BUFF_1 = 1;
93 volk_gnsssdr::vector<uint32_t> d_all_fft_codes_;
98 pcps_acquisition_fpga_sptr acquisition_fpga_;
99 const std::string role_;
105 #endif // GNSS_SDR_BASE_PCPS_ACQUISITION_FPGA_H Class that contains all the configuration parameters for generic acquisition block based on the PCPS ...
Base class providing shared logic for FPGA-based GPS PCPS acquisition adapters.
Interface of the State Machine for channel.
This abstract class represents an interface to an acquisition GNSS block.
This is the class that contains the information that is shared by the processing blocks.
This abstract class represents an interface to configuration parameters.
This class implements a Parallel Code Phase Search Acquisition for the FPGA.
Interface of the Gnss_Synchro class.