GNSS-SDR  0.0.13
An Open Source GNSS Software Defined Receiver
dll_pll_conf_fpga.h
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1 /*!
2  * \file dll_pll_conf_fpga.h
3  * \brief Class that contains all the configuration parameters for generic
4  * tracking block based on a DLL and a PLL for the FPGA.
5  * \author Marc Majoral, 2019. mmajoral(at)cttc.cat
6  * \author Javier Arribas, 2018. jarribas(at)cttc.es
7  *
8  * Class that contains all the configuration parameters for generic tracking block based on a DLL and a PLL.
9  *
10  * -----------------------------------------------------------------------------
11  *
12  * Copyright (C) 2010-2020 (see AUTHORS file for a list of contributors)
13  *
14  * GNSS-SDR is a software defined Global Navigation
15  * Satellite Systems receiver
16  *
17  * This file is part of GNSS-SDR.
18  *
19  * SPDX-License-Identifier: GPL-3.0-or-later
20  *
21  * -----------------------------------------------------------------------------
22  */
23 
24 #ifndef GNSS_SDR_DLL_PLL_CONF_FPGA_H
25 #define GNSS_SDR_DLL_PLL_CONF_FPGA_H
26 
27 #include "configuration_interface.h"
28 #include <cstdint>
29 #include <string>
30 
31 class Dll_Pll_Conf_Fpga
32 {
33 public:
34  Dll_Pll_Conf_Fpga();
35  void SetFromConfiguration(const ConfigurationInterface* configuration, const std::string& role);
36 
37  /* DLL/PLL tracking configuration */
38  std::string device_name;
39  std::string dump_filename;
40 
41  double fs_in;
42  double carrier_lock_th;
43 
44  float pll_pull_in_bw_hz;
45  float dll_pull_in_bw_hz;
46  float fll_bw_hz;
47  float pll_bw_hz;
48  float dll_bw_hz;
49  float pll_bw_narrow_hz;
50  float dll_bw_narrow_hz;
51  float early_late_space_chips;
52  float very_early_late_space_chips;
53  float early_late_space_narrow_chips;
54  float very_early_late_space_narrow_chips;
55  float slope;
56  float spc;
57  float y_intercept;
58  float cn0_smoother_alpha;
59  float carrier_lock_test_smoother_alpha;
60 
61  uint32_t pull_in_time_s; // signed integer, when pull in time is not yet reached it has to be compared against a negative number
62  uint32_t bit_synchronization_time_limit_s;
63  uint32_t vector_length;
64  uint32_t smoother_length;
65  uint32_t dev_file_num;
66  uint32_t num_prev_assigned_ch;
67  uint32_t code_length_chips;
68  uint32_t code_samples_per_chip;
69  uint32_t extend_fpga_integration_periods;
70  uint32_t fpga_integration_period;
71 
72  int32_t fll_filter_order;
73  int32_t pll_filter_order;
74  int32_t dll_filter_order;
75  int32_t extend_correlation_symbols;
76  int32_t cn0_samples;
77  int32_t cn0_min;
78  int32_t max_code_lock_fail;
79  int32_t max_carrier_lock_fail;
80  int32_t cn0_smoother_samples;
81  int32_t carrier_lock_test_smoother_samples;
82  // int32_t max_lock_fail;
83 
84  int32_t* ca_codes;
85  int32_t* data_codes;
86 
87  char signal[3];
88  char system;
89 
90  bool extended_correlation_in_fpga;
91  bool track_pilot;
92  bool enable_doppler_correction;
93  bool enable_fll_pull_in;
94  bool enable_fll_steady_state;
95  bool carrier_aiding;
96  bool high_dyn;
97  bool dump;
98  bool dump_mat;
99 };
100 
101 #endif
ConfigurationInterface
This abstract class represents an interface to configuration parameters.
Definition: configuration_interface.h:41
Dll_Pll_Conf_Fpga
Definition: dll_pll_conf_fpga.h:31
configuration_interface.h
This class represents an interface to configuration parameters.
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