GNSS-SDR 0.0.21
An Open Source GNSS Software Defined Receiver
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dll_pll_conf_fpga.h
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1/*!
2 * \file dll_pll_conf_fpga.h
3 * \brief Class that contains all the configuration parameters for generic
4 * tracking block based on a DLL and a PLL for the FPGA.
5 * \author Marc Majoral, 2019. mmajoral(at)cttc.cat
6 * \author Javier Arribas, 2018. jarribas(at)cttc.es
7 *
8 * Class that contains all the configuration parameters for generic tracking block based on a DLL and a PLL.
9 *
10 * -----------------------------------------------------------------------------
11 *
12 * GNSS-SDR is a Global Navigation Satellite System software-defined receiver.
13 * This file is part of GNSS-SDR.
14 *
15 * Copyright (C) 2010-2020 (see AUTHORS file for a list of contributors)
16 * SPDX-License-Identifier: GPL-3.0-or-later
17 *
18 * -----------------------------------------------------------------------------
19 */
20
21#ifndef GNSS_SDR_DLL_PLL_CONF_FPGA_H
22#define GNSS_SDR_DLL_PLL_CONF_FPGA_H
23
24#include "configuration_interface.h"
25#include <cstdint>
26#include <string>
27
28/** \addtogroup Tracking
29 * \{ */
30/** \addtogroup Tracking_libs
31 * \{ */
32
33
34class Dll_Pll_Conf_Fpga
35{
36public:
37 Dll_Pll_Conf_Fpga();
38 void SetFromConfiguration(const ConfigurationInterface* configuration, const std::string& role);
39
40 /* DLL/PLL tracking configuration */
41 std::string device_name{"/dev/uio"};
42 std::string dump_filename{"./dll_pll_dump.dat"};
43
44 double fs_in{12500000.0};
45 double carrier_lock_th{0.0};
46 double bs_dominance_ratio{0.6};
47
48 float pll_pull_in_bw_hz{50.0};
49 float dll_pull_in_bw_hz{3.0};
50 float fll_bw_hz{35.0};
51 float pll_bw_hz{5.0};
52 float dll_bw_hz{0.5};
53 float pll_bw_narrow_hz{2.0};
54 float dll_bw_narrow_hz{0.25};
55 float early_late_space_chips{0.25};
56 float very_early_late_space_chips{0.5};
57 float early_late_space_narrow_chips{0.15};
58 float very_early_late_space_narrow_chips{0.5};
59 float slope{1.0};
60 float spc{0.5};
61 float y_intercept{1.0};
62 float cn0_smoother_alpha{0.002};
63 float carrier_lock_test_smoother_alpha{0.002};
64 float bs_min_prompt_mag{0.0};
65
66 uint32_t pull_in_time_s{5U}; // signed integer, when pull in time is not yet reached it has to be compared against a negative number
67 uint32_t bit_synchronization_time_limit_s{70U};
68 uint32_t vector_length{0U};
69 uint32_t smoother_length{10U};
70 uint32_t code_length_chips{0U};
71 uint32_t code_samples_per_chip{0U};
72 uint32_t extend_fpga_integration_periods{1};
73 uint32_t fpga_integration_period{0};
74
75 int32_t fll_filter_order{1};
76 int32_t pll_filter_order{3};
77 int32_t dll_filter_order{2};
78 int32_t extend_correlation_symbols{1};
79 int32_t cn0_samples{0};
80 int32_t cn0_min{0};
81 int32_t max_code_lock_fail{0};
82 int32_t max_carrier_lock_fail{0};
83 int32_t cn0_smoother_samples{200};
84 int32_t carrier_lock_test_smoother_samples{25};
85 // int32_t max_lock_fail;
86 int32_t bs_stable_best_required{3};
87 int32_t bs_min_events_for_lock{10};
88
89 int32_t* ca_codes{nullptr};
90 int32_t* data_codes{nullptr};
91
92 char signal[3]{};
93 char system{'G'};
94
95 bool extended_correlation_in_fpga{false};
96 bool track_pilot{true};
97 bool enable_doppler_correction{false};
98 bool enable_fll_pull_in{false};
99 bool enable_fll_steady_state{false};
100 bool carrier_aiding{true};
101 bool high_dyn{false};
102 bool dump{false};
103 bool dump_mat{true};
104 bool bs_use_phase_dot_detector{true};
105};
106
107
108/** \} */
109/** \} */
110#endif // GNSS_SDR_DLL_PLL_CONF_FPGA_H
ConfigurationInterface
This abstract class represents an interface to configuration parameters.
Definition configuration_interface.h:45
configuration_interface.h
This class represents an interface to configuration parameters.
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