GNSS-SDR 0.0.21
An Open Source GNSS Software Defined Receiver
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dma_signal_source_fpga.h
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1/*!
2 * \file dma_signal_source_fpga.h
3 * \brief signal source for a DMA connected directly to FPGA accelerators.
4 * This source implements only the DMA control. It is NOT compatible with
5 * conventional SDR acquisition and tracking blocks.
6 * \author Marc Majoral, mmajoral(at)cttc.es
7 *
8 * -----------------------------------------------------------------------------
9 *
10 * GNSS-SDR is a Global Navigation Satellite System software-defined receiver.
11 * This file is part of GNSS-SDR.
12 *
13 * Copyright (C) 2010-2024 (see AUTHORS file for a list of contributors)
14 * SPDX-License-Identifier: GPL-3.0-or-later
15 *
16 * -----------------------------------------------------------------------------
17 */
18
19#ifndef GNSS_SDR_DMA_SIGNAL_SOURCE_FPGA_H
20#define GNSS_SDR_DMA_SIGNAL_SOURCE_FPGA_H
21
22#include "concurrent_queue.h"
23#include "fpga_dma-proxy.h"
25#include "fpga_switch.h"
27#include "signal_source_base.h"
28#include <pmt/pmt.h>
29#include <cstdint>
30#include <memory>
31#include <mutex>
32#include <string>
33#include <thread>
34
35
36/** \addtogroup Signal_Source
37 * \{ */
38/** \addtogroup Signal_Source_adapters
39 * \{ */
40
41
43
44class DMASignalSourceFPGA : public SignalSourceBase
45{
46public:
47 DMASignalSourceFPGA(const ConfigurationInterface *configuration,
48 const std::string &role, unsigned int in_stream,
49 unsigned int out_stream, Concurrent_Queue<pmt::pmt_t> *queue);
50
51 ~DMASignalSourceFPGA();
52
53 void start() override;
54
55 inline size_t item_size() override
56 {
57 return item_size_;
58 }
59
60 void connect(gr::top_block_sptr top_block) override;
61 void disconnect(gr::top_block_sptr top_block) override;
62 gr::basic_block_sptr get_left_block() override;
63 gr::basic_block_sptr get_right_block() override;
64
65private:
66 const std::string dyn_bit_sel_device_name = std::string("dynamic_bits_selector"); // Switch dhnamic bit selector device name
67 const std::string empty_string;
68 const uint64_t default_bandwidth = 12500000;
69 // perform dynamic bit selection every 500 ms by default
70 const uint32_t Gain_control_period_ms = 500;
71 // sample block size when running in post-processing mode
72 const int sample_block_size = 16384;
73 const int32_t switch_to_DMA = 0;
74
75 void run_DMA_process(const std::string &filename0,
76 const std::string &filename1,
77 uint64_t &samples_to_skip,
78 size_t &item_size,
79 int64_t &samples,
80 bool &repeat,
81 uint32_t &dma_buff_offset_pos,
83
84 void run_dynamic_bit_selection_process();
85
86 std::thread thread_file_to_dma;
87 std::thread thread_dynamic_bit_selection;
88
89 std::shared_ptr<Fpga_Switch> switch_fpga;
90 std::shared_ptr<Fpga_dynamic_bit_selection> dynamic_bit_selection_fpga;
91 std::shared_ptr<Fpga_DMA> dma_fpga;
92
93 std::mutex dma_mutex;
94 std::mutex dynamic_bit_selection_mutex;
95
97
98 std::string filename0_;
99 std::string filename1_;
100
101 uint64_t sample_rate_;
102 uint64_t samples_to_skip_;
103 int64_t samples_;
104 uint32_t num_input_files_;
105 uint32_t dma_buff_offset_pos_;
106 uint32_t in_stream_;
107 uint32_t out_stream_;
108 size_t item_size_;
109
110 bool enable_DMA_;
111 bool enable_dynamic_bit_selection_;
112 bool repeat_;
113};
114
115
116/** \} */
117/** \} */
118#endif // GNSS_SDR_DMA_SIGNAL_SOURCE_FPGA_H
This class implements a thread-safe std::queue.
This abstract class represents an interface to configuration parameters.
void start() override
Start the flow of samples if needed.
SignalSourceBase(ConfigurationInterface const *configuration, std::string role, std::string impl)
Constructor.
Interface of a thread-safe std::queue.
FPGA DMA control. This code is based in the Xilinx DMA proxy test application: https://github....
Dynamic bit selection in the received signal.
Switch that connects the HW accelerator queues to the analog front end or the DMA.
This interface represents a GNSS block.
Header file of the base class to signal_source GNSS blocks.