GNSS-SDR 0.0.21
An Open Source GNSS Software Defined Receiver
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HistogramBitSynchronizer::Config Struct Reference

Configuration parameters for HistogramBitSynchronizer. More...

#include <bit_synchronizer.h>

Public Attributes

int bit_period_ms
 Navigation data bit period in milliseconds.
int epoch_ms
 Time interval between successive calls to update(), in milliseconds.
int min_events_for_lock
 Minimum number of detected transition events required before lock evaluation.
double dominance_ratio
 Required dominance ratio of the winning histogram bin.
int stable_best_required
 Required stability of the dominant histogram bin (consecutive evaluations).
float min_prompt_mag
 Minimum magnitude of the prompt correlator output.
bool use_phase_dot_detector
 Select the transition detection method.

Detailed Description

Configuration parameters for HistogramBitSynchronizer.

These parameters define the bit period, the update cadence, the lock criteria, and the transition detection method.

Definition at line 43 of file bit_synchronizer.h.

Constructor & Destructor Documentation

◆ Config()

HistogramBitSynchronizer::Config::Config ( )
inline

Definition at line 128 of file bit_synchronizer.h.

Member Data Documentation

◆ bit_period_ms

int HistogramBitSynchronizer::Config::bit_period_ms

Navigation data bit period in milliseconds.

This is the nominal duration of one navigation data bit.

Definition at line 50 of file bit_synchronizer.h.

◆ dominance_ratio

double HistogramBitSynchronizer::Config::dominance_ratio

Required dominance ratio of the winning histogram bin.

Lock requires the most frequent histogram bin to be sufficiently dominant:

\[ \text{dominance\_ratio} = \frac{\text{best\_bin\_count}}{\text{total\_detected\_events}} \]

Guidance:

  • Values near 0.5 may lock faster but increase false-lock probability.
  • Values closer to 1.0 are conservative and require a clearly dominant phase.

Definition at line 84 of file bit_synchronizer.h.

◆ epoch_ms

int HistogramBitSynchronizer::Config::epoch_ms

Time interval between successive calls to update(), in milliseconds.

This should match the minimum integration interval (epoch) produced by the tracking loop and used to generate the provided prompt correlator output.

Definition at line 58 of file bit_synchronizer.h.

◆ min_events_for_lock

int HistogramBitSynchronizer::Config::min_events_for_lock

Minimum number of detected transition events required before lock evaluation.

The histogram is built from detected candidate transitions. Lock decisions are not attempted until at least this many events have been accumulated.

Trade-offs:

  • Larger values increase robustness against false locks but increase time-to-lock.
  • Smaller values reduce time-to-lock but increase sensitivity to noise/spurious transitions.

Definition at line 70 of file bit_synchronizer.h.

◆ min_prompt_mag

float HistogramBitSynchronizer::Config::min_prompt_mag

Minimum magnitude of the prompt correlator output.

Candidate transition detection is suppressed when \(|P| < \text{min\_prompt\_mag}\), where \(P\) is the prompt correlator output.

Use this to avoid counting unreliable transitions when tracking quality is poor or the prompt output is dominated by noise.

Definition at line 105 of file bit_synchronizer.h.

◆ stable_best_required

int HistogramBitSynchronizer::Config::stable_best_required

Required stability of the dominant histogram bin (consecutive evaluations).

Even if the dominance ratio is met, the algorithm requires that the same histogram bin remains dominant for this many consecutive lock evaluations before declaring lock.

This helps prevent locking on transient peaks caused by noise or short-lived disturbances.

Definition at line 94 of file bit_synchronizer.h.

◆ use_phase_dot_detector

bool HistogramBitSynchronizer::Config::use_phase_dot_detector

Select the transition detection method.

If true (recommended), uses a “phase-dot” detector:

  • A candidate transition is detected when:

    \[ \Re\{ P_k \cdot P^*_{k-1} \} < 0 \]

    where \(P_k\) is the current prompt and \(P^*_{k-1}\) the conjugate of the previous.

This method is largely insensitive to constant carrier phase rotations and is often more robust during early tracking / imperfect carrier phase alignment.

If false, uses a simpler sign-change detector on the real part:

  • A candidate transition is detected when sign(Re(P_k)) != sign(Re(P_{k-1})).

This assumes the prompt output is already aligned with the data bit polarity (i.e., stable PLL lock and correct navigation bit polarity mapping).

Definition at line 126 of file bit_synchronizer.h.


The documentation for this struct was generated from the following file: